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STLD CSE External Practical

Added on , Posted by passhojao


Date of practical: 25-11-2016
Teacher: Vadithya Sir (Spelling not confirmed)
Practical started at around 9:45 - 10 am for slot 1 group. For second slot group although the scheduled time was 2pm, it started early around 12:30 -1 pm. Don't be late for the practical or Sir won't let you enter the lab. There were total 10 questions and most of the questions had sub parts(i.e. two experiments in 1 question). Students were asked to pick answer sheets according to the roll numbers and the question number was written on the second page of the sheet. ( Pro advice: If you don't know how to perform the experiment for your question number don't start writing the name on the sheet and see for 5 minutes if you get a chance to exchange answer sheet when no one's looking? ). First we had to write the experiment, get it checked by Sir, then perform the experiment and show the circuit to Sir after which your answer sheet would be signed. After performing the experiment was the viva taken by external teacher.
Following are the questions of the practical

  1. To verify the truth table of different gates
    • Basic gates
    • Special gates
    • Universal gates
  2. Realize the basic and special gates using universal gates.
  3. To design the encoder and decode circuits.
  4. To realize the shift register
    • PIPO
    • SISO
    • SIPO
  5. To implement and design
    • Decade counter
    • 4 bit comparator

In development. Will write complete questions later.


Suitable for Students in year(s): 2

Suitable for branch(es): CSE and ECE

College: Govind Ballabh Pant Engineering College(GBPEC)


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Comments
Posted by farhan,

Baaki k 5 bhi bata do kaunse exp the?