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Stld practical file

New Doc 2018-12-20 12.01.11.pdf
File size: 23.1 MB

File content type: application/pdf

Category: Practical Files

Course: B.Tech.

Semester: 3

College: Govind Ballabh Pant Engineering College(GBPEC)

Following are the experiments given in the practical file -
Experiment 1:
i) To verify the truth table of all the logic gates.
ii) To realize all the gates using universal gates and verify it.

Experiment 2: To construct half adder, full adder, half subtracter, full subtracter using logic gates and verify the same.

Experiment 3: To verify the basic laws of boolean algebra.

Experiment 4A: Design and verify the truth table of a 4 bit parity generator.

Experiment 4B: Design and verify the truth table of a BCD to Ex-3 code generator.

Experiment 4C: Design and verify truth table of a 4 bit binary to gray code and gray code to binary code generator.

Experiment 5: Design and verify BCD to 7 Segment decoder truth table.

Experiment 6: Realize a 4x1 multiplexer and a 1x4 demultiplexer and verify the truth table.

Experiemtn 7: To relaize 4 bit parallel adder circuit using the IC 7483.

Experiment 8: To design and verify a 4 bit BCD adder.

Experiment 9: To study and design SR, JK, T and D flip flops and its truth table.

Experiment 10: To implement priority encoder.
Experiment 11: To implement up down counter and verify using truth table.
Experiment 12: to implement and verify decade counter.
Experiment 13: To implement and verify ring counter.
Experiment 14: To implement and verify 4 bit shift register.

Added by Vishi13